IC Verification Engineers

  • Closing date 24 Nov 2019
  • Type Full-time
  • Duration Permanent

Our verification team is growing, and we are looking for talented IC verification engineers to join us. This challenging and varied role will involve verification of both IPs and SoCs. The work will cover all aspects of the verification flow from verification planning and development of environments through to testcase writing, gathering coverage and maintaining regression suites. Our verification engineers have a wide range of tools at their disposal from simulation and formal methods through to FPGAs and will use each as appropriate. With a philosophy of continuous improvement every engineer is encouraged to propose enhancements to our flow and contribute to the advancement of our verification methodology.

To excel in these roles, we look for experience of the following verification techniques:

  • SystemVerilog/UVM
  • Verification planning and closure
  • Assertions
  • Formal verification
  • Low power/UPF
  • Python

Experience of standard bus, network and display interfaces e.g. USB, Ethernet, PCIe, DisplayPort, are always a bonus for DisplayLink.

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